Azure smartnic. 1 Microsoft has historically implemented these NICs as a bump-in-the-wire FPGA sitting between a standard host NIC (like a Mellanox ConnectX-5) and the network cable that connects up to a switch.  The backbone of a NIC is a PCIe that attaches to a server and enables To this end, this paper provides a background encompassing an overview of the evolution of NICs from basic to SmartNICs, describing their architectures, development environments, and advantages over legacy NICs. Microsoft Azure SmartNIC boards (Gen one on right, Gen two on left) and bump-in-the-wire architecture. Users will soon have access to MANA benefits through the upcoming Azure Boost service, currently available for preview. Azure FPGA-based SmartNIC FPGA = Field Programmable Gate Array Hardware Architecture Software Stack Software Stack There are three different processing units to build a SmartNIC upon. See you at NSDI ’18!. Our Solution: Azure SmartNIC (FPGA) HW is needed for scale, perf, and COGS at 40G+ 12-18 month ASIC cycle + time to roll new HW is too slow To compete and react to new needs, we need agility – SDN Programmed using Generic Flow Tables Language for programming SDN to hardware A discrete SmartNIC does not incorporate CPU cores and thus, cannot run autonomously without a host platform. Microsoft claims that AccelNet offers less than 15μs VM-VM TCP latencies and 32 Gbps throughput. The paper detailed the Azure SmartNIC, a FPGA-based programmable NIC, as well as Accelerated Networking, a service for high performance network providing cloud-leading network performance. These cards seem to be used in several Microsoft projects and Azure servers. We present Azure Accelerated Networking (AccelNet), our solution for offloading host networking to hardware, using custom Azure SmartNICs based on FPGAs. There are at least two versions of these cards: PCI Express "standard" card format, codename 'Longs Peak' Open Compute Project (OCP) Mezzanine card format, codename 'Dragontails Peak', for this form factor there are at There are three different processing units to build a SmartNIC upon. " NIC stands for a network interface card, according to Kevin Deierling from Mellanox Technologies (another SmartNIC manufacturer). May 28, 2025 · That effort built muscle within Microsoft which then informed Azure’s SmartNIC program which is detailed in SmartNICs in the Public Cloud. May 28, 2025 · Microsoft uses SmartNICs in all of its Azure servers to offload SDN functions since 2015. Project Catapult resulted in network-attachable FPGA hardware and techniques to program them which were then adopted by a different part of Microsoft to create SDN accelerators within NICs. 1 Jul 19, 2023 · Microsoft’s Azure is using MANA smartNICs to accelerate network and storage speed, giving it AWS Nitro-like functions. Figure 1 is a presentation slide of Microsofts paper "Azure accelerated networking: Smartnics in the public cloud" [1] and shows 5 different options to accelerate SDN speeds. Regardless of whether the SmartNIC is SoC or discrete, its packet processing logic may be ASIC and FPGA. Both Azure SmartNICs and AccelNet have been deployed at scale for multiple years, 3-4 years, with 100s of 1000s of customer VMs across Azure flee. Apr 6, 2018 · By the way, the Azure SmartNIC hardware that I mentioned at the beginning of this post is in production and widely available to Azure customers. You can read about it in the engaging Azure Blog post, “ Maximize your VM’s Performance with Accelerated Networking – now generally available for both Windows and Linux ”. Azure FPGA-based SmartNIC FPGA = Field Programmable Gate Array Hardware Architecture Software Stack Software Stack The Networking Infrastructure Group at Microsoft Research Asia engages in fundamental research on all aspects of computer networking and infrastructure. Various SmartNICs available in the market may employ either of these hardware architectures or in some cases, a combination of both. Also the reciprocity of the flexibility versus the efficiency of the hardware solutions is illustrated. Before delving into the business politics of Xilinx's latest SmartNIC device, it may be helpful to lay the groundwork of what we mean by "SmartNICs. This project aims to document the Catapult v3 SmartNIC cards that can be found occasionally on eBay. Azure Accelerated Networking (AccelNet) is our solution for offloading host networking to hardware, using custom Azure SmartNICs based on FPGAs. We present Azure Accelerated Networking (AccelNet), our solution for offloading host networking to hardware, using custom Azure SmartNICs based on FPGAs. Strengths The paper detailed the Azure SmartNIC, a FPGA-based programmable NIC, as well as Accelerated Networking, a service for high performance network providing cloud-leading network performance. We define the goals of AccelNet, including programmability comparable to software, and performance and efficiency comparable to hardware. Mar 4, 2020 · Azure SmartNICs implement Microsoft's accelerator network (or "AccelNet") and are deployed on Azure servers deployed since 2015. akn jlg htr auw jkq rwg tkb fif ryh njj msy axi pia rsu mba